Indian Software Labs (ISL) Referral Program

If you are elligible for any of the criteria; Send your CV to ibm.animesh@gmail.com

ISL Referral Program

Skill requirements:

Skill and Job Description	GOM Code	Relevant Exp.	Total Exp.	Joining Location	Interview Location
ITHD - Physical design Engineer                                                                                                                                  Educational Background: BE/BTech/MTech in ECE/EE/CSE Job responsibilities include physical implementation of high speed digital blocks from RTL through physical verification .Must have strong CMOS digital circuit fundamentals. Be able to analyze transistor level circuits for critical paths.  Must have hands on experience in physical design of digital circuits from synthesis, placement, routing. Hands on experience with physical verification, timing closure and signal integrity closure for large block level designs. Ability to adopt to new technologies and tools/flows is a must.  Familiarity to VHDL, SPICE, Schematic entry will be added advantage.	STG-0438130	3	5	Bangalore	Bangalore
ITHD - Sr Physical Design Engineer                                                                                                                                                                                                                                                                                                                      Job Description :Looking for professionals with hands on Physical Design experience ( ASICs, ASPs, Processors ). The Job involves handling high performance unit level integration for processor chip.  Responsibilities include, floorplanning, planning signal wires, pushing the data into lower level macros,  physical integration of the lower level abstracts at the next higher level, timing closure, clean up signal and design integrity issues,  physical verification and complete delivery of the high quality integrated unit to the chip level. Hands on exposure to timing closure techniques is a must.  This role Involves working with global PD and timing leads, Logic Designers, PD engineers and project managers in a matrix organization.  Individual must have hands on PD experience with industry standard tools.  Exposure to Cadence virtuoso tool will be added advantage. Candidates with Processor implementation back ground are preferred. Looking for candidates with more than 6 years of relavent PD experience. This role Involves working with global PD and timing leads, Logic Designers, PD engineers and project managers in a matrix organization.  Individual must have hands on PD experience with industry standard tools.  Exposure to Cadence virtuoso tool will be added advantage. Candidates with Processor implementation back ground are preferred. Looking for candidates with more than 6 years of relavent PD experience.	STG- 0438132	8	12	Bangalore	Bangalore
ITHD - Verification Engineer :                                                                                                                                         Verification expertise (chip level and/or block level)  - From spec to tape-out for complex designs.   Test plan/testbench infrastructure/test cases/coverage ownership and execution for multiple projects. * Hands on experience in System Verilog/Specman/Vera or C++. * Knowledge of CPU architecture (inclusive of but not limited to cores/io's/memories and related logic). * System level awareness - integration/initialization/bring-up/DFT is a huge plus.  * Excellent planning/motivation/team playing and communication skills to excel in a multi-site working environment. * Enthusiasm to learn new functional domains and methodologies.	STG- 0438171	1.6	8	Bangalore	Bangalore
ITHD - Verification Lead :                                                                                                                                         Verification expertise (chip level and/or block level)  - From spec to tape-out for complex designs.   Test plan/testbench infrastructure/test cases/coverage ownership and execution for multiple projects. * Hands on experience in System Verilog/Specman/Vera or C++. * Knowledge of CPU architecture (inclusive of but not limited to cores/io's/memories and related logic). * System level awareness - integration/initialization/bring-up/DFT is a huge plus.  * Excellent planning/motivation/team playing and communication skills to excel in a multi-site working environment. * Enthusiasm to learn new functional domains and methodologies.	STG- 0438169	8	12	Bangalore	Bangalore
ITHD - FLM Backend: Processor Development                                                                                                                                               People manager for a group of 15-20 development engineers working on high end microprocessors. Position includes all people managment tasks like managing organizational issues, ramping and retaining a team, motivating employees, setting goals and providing feedback for individual development. It further includes project management tasks in a global development team, with focus on driving execution on cross geographic projects out of Bangalore. Excellent communication skills, focus on execution, and hands on and management background in processor development in the areas of Verification or Circuit Design/Layout is required.	STG- 0438538	12	20	Bangalore	Bangalore
SPOC - Shilpa Shankar - shilpsha@in.ibm.com
OPC Modeling Manager                                                                                                                                                                         Candidate should have extensive management experience and background in the patterning / Semiconductor R&D domain. Should have a proven track record of leading cross functional teams in patterning and pattern corrections domain for problem solving. In-depth knowledge and experience of photolithography and reticle enhancement techniques with exposure to 45nm, 32nm and other advanced  technology nodes.  Prior experience with OPC model build, OPC code development and pattern verifications is a big plus. Qualified candidates must possess a MS/ Ph.D in Computer Science, Electrical Engineering or related fields	STG-0437943	4 to 12 yrs	4 to 12 yrs	Bangalore	Bangalore
OPC/ORC Engineer                                                                                                                                                                                                                                                                                Interact with integration and design teams to provide optical proximity corrections on design patterns and improve manufacturability. Lead team to develop new techniques (including scripts & tools) to address technology issues and keyword challenges.Candidate should have knowledge in reticle enhancement techniques (RET),  design technology co-optimization  with exposure to 45nm, 32 nm technologies. Ability to interface with lithography, integration and design teams. Knowledge of physical design, layout, and routing is desirable.Strong leadership skills with technical depth required, experience with global teams a pig plus.Experience with physical verification tools such as Mentor Calibre SVRF, Cadence Assura, and/or Cadence Virtuoso.  C / C++ coding and shell / tcl / Perl scripting, object oriented programming a plus.	STG-0438114	2-6 yrs	2-6 yrs	Bangalore	Bangalore
Parasitic Extraction Developer  To develop Parasitic Extraction (PEX) technology files to support IBM Processes Technologies• Review and interpret process design rules, spice model, interconnect specification and electrical parameter documents, to create specification data for PEX runset development..• Develop PEX runset to support the major PEX tools used by customers. Create and maintain test cases for PEX runsets and perform quality assurance checks to ensure error free deliveries to customers.• Validate PEX runset integration with device library and layout-vs-schematic runset+spice models for postlayout simulation to ensure proper integration of process design kit components.• Create and update release notes and application notes, and to document any known limitations, issues, and solutions, in order to communicate relevant information on proper usage of the Process Design Kit components to IBM customers.	STG-0438123	6- 10 yrs…0r PHD with 4-5 yrs	6- 10 yrs…0r PHD with 4-5 yrs	Bangalore	Bangalore
Project Manager                                                                                                                                                                                                                   This role is responsible for leading a project team in delivering a solution to the customer using the appropriate business measurements and terms & conditions for the projects according to the project charter or project agreement. He/She is responsible for overall performance for managing scope, cost, schedule and contractual deliverables, which includes applying techniques for planning, tracking, change control and risk management. They are also responsible for managing all the project resources and for establishing an effective communication plan with the project team and the customer. They provide day to day direction to the project team and regular project status to the customer. The employee focuses on individual/team objectives and development of professional effectiveness.• Extensive experience with Web architecture and design ,• Fluent in web frameworks including Spring MVC, Struts, JSF, AJAX, Java script, JSON, Dojo etc • Good understanding of DB2 and SQL,• Fluent in Object oriented design and has knowledge of many design patterns,• Strong experience in XML,• Strong experience in XML • Practical experience in Object Relational Mapping (ORM) Frameworks such or Hibernate or iBatis or JPA,• Experience in Apache and Tomcat , WAS, Enterprise RedHat Linux	STG-0438127	10- 12yrs	10- 12yrs	Bangalore	Bangalore
Verfication Engineer The following is the Job Description for Verification engineer, 3 to 5 years experience in Verilog (preferred) / VHDL.Experience in test pattern generation and logic verification / simulation prior to design tape-outDRAM or Memory test experience a plus. Experience with Analog Mixed Signal verification could be an added bonuss	STG-0438126	3-5 yrs	3-5 yrs	Bangalore	Bangalore
Content Management and UI Developer The worldwide System x Electronic Support Content Enablement team edits, tags, and publishes technical support content to support.ibm.com. The team is responsible for publishing and maintaining product publications, installation guides, parts lists, RETAIN tips, and other web content needed to support our System x brand and clients. Using an in-house tool and ibm.com style and design standards, the team reviews content for compliance, tags it for consistency, reviews it for quality, and publishes it to the external website. The team also manages the website presence for our brands to ensure the content is available and findable by clients. The persons on the team work in a fast-paced environment in order to meet deadlines and service level agreements, are detail-oriented and quality focused, and are strong team players who work well in a remote environment.Extensive experience with Content management, Technical writing, HTML, CSS and JavaScript skills.Ability to work with Adobe Creative Suite 4/5 tools (Dreamweaver, Fireworks / PhotoShop) Fluent in Web design, UI development and User experience skills.Strong communication skills (written and oral,)Fluent in U.S. English (Good level of spelling/grammar, writing and editing skills	STG-0449770	3-5 yrs	3-5 yrs	Bangalore	Bangalore
ASICLayoutDesigner                                                                                                                                                                                                                                                                                                             Layouts of the circuits/ sub-circuits would include Receivers, ADC ,VR,Comparators,LVDS, PLL....etc with floor planing knowledge macro/block wise.etc . Run all necessary Physical Design (PD) rule checks like DRC, LVS, Meth, ESD,ERC,IR,EM..etc. using industry standard tools like Calibre,Hercules...etc.Knowledge of layout methodogies like Cross-Coupling, Common Centroid, Mirroring, Interdigitation for Analog layouts. VLSI circuit layout using industry leading tools, in particular CADENCE Virtuoso XL with technology nodes 65nm and below . Responsible for a number of custom layouts which meet timing, power, noise and electromigration requirements . layout verification methodologies, and design for yield and manufacturability . Ability to write CADENCE “SKILL”  programming ,Perl is a plus . Basic understanding of CMOS technology and devices .CMOS Circuit Design knowledge would be advantageous .  Ability to work in an international team and a dynamic environment .Ability to learn and adapt to new tools and methodologies.  Excellent communication and teamwork skills and good English is required .Star RC layout extraction knowledge is a plus. Work in a Team with Circuit Designer, Integrator and Timing Lead . Optimize Interconnections (Resistivity, Capacitance) for area and delay. Optimize design for Yield and Manufacturability . “Skill” programming for enhanced layout productivity . Deliver all cadence design data according to schedule in required quality.	STG-0406267	6 yrs	6 yrs	Bangalore
Circuitdesignengineer: Candidate will be responsible for circuit design and verification of high speed SerDes IP blocks.b/ Work with digital/ Analog / layout designers across various global sites, to integrate the IP block Skills and Qualifications: B.Tech, MTech/MS with atleast 0- 4years of circuit design blocks implementation experience Must have strong analog circuit design knowledge and hands on experience in transistor level design, layout and design closure Candidate should be have good experience in design of analog macros like, Amplifiers, Voltage regulators, Data converters, PLL high speed serial driver, receiver design.Candidate should have in-depth understanding of couple of macros, and hands on experience in taking the analog macro's design from spec to GDS.Hands on experience with Cadence Spectre, APS, Virtuoso, Star RC extraction tools, Strong communication skills ( oral and written ) and be a strong team player,Good Signal integrity ( EM, IR Drop, and xtalk ) understanding. Be able to analyze and fix the violations  Good scripting and automation skills ( perl, tcl ) would be added advantage,Exposure to Serdes, DDR3, . PCIe and architecture experience on IPs for real products would be an added advantage.	STG-0406268	0- 4years	0- 4years	Bangalore
SeniorPhysical/ASICDesignEngineer                                                                                                                                                                                                                                                                      :Looking for professionals with hands on Physical Design experience ( ASICs, ASPs, Processors ). The Job involves handling high performance unit level integration for processor chip. Responsibilities include, floor planning, planning signal wires, pushing the data into lower level macros,  physical integration of the lower level abstracts at the next higher level, timing closure, clean up signal and design integrity issues,  physical verification and complete delivery of the high quality integrated unit to the chip level. Hands on exposure to timing closure techniques is a must.  This role Involves working with global PD and timing leads,PD engineers and project managers in a matrix organization.  Individual must have hands on PD experience with industry standard tools.  Exposure to Cadence virtuoso tool will be added advantage.                                                             Candidates with Processor implementation back ground are preferred.	STG-0406262	6 yrs	6 yrs	Bangalore
LogicDesigner                                                                                                                                                                                                                                                                                               Our engineers work on logic Design, Synthesis, Front End Processing on IBM's leading edge IPs - High Speed SerDes & DDR3 Phy, as well as complex System ASICs. The position requires solid understanding of logic design for complex designs involving analog and digital parts, hands on coding experience using VHDL/Verilog/RTL, experience with EDA tools on Synthesis, FEP, Boolean Equivalence checks & Timing closure. Scripting knowledge with Perl will be a plus.  this is a old one but would should work .	STG-0406264	2-10 yrs	2-10 yrs	Bangalore
VerificationLead                                                                                                                                                                                                                                                                                                                      Implement verification plans to verify unit level, sub-system and core / chip level functionality. Define, architect and build a robust and re-usable verification environment for the core / chip.Solid understanding of VHDL / Verilog based RTL designs. Verification coding experience in System Verilog with OVM knowledge with good debugging expertize. Work closely with design engineers to ensure adequate functional and code coverage, and create fully random based testbench and testcases. Preference given to candidates with formal verification experience. BTech, M Tech/MS with minimum 5-7 years experience (atleast 2 yrs in a leadership role). 2 years experience with System Verilog / Vera / Specman Constrained Random test-bench knowledge.1 year experience with Assertion-Based Verification (SVA, PSL).	STG-0406265	5-7 yrs	5-7 yrs	Bangalore
Open Pages Consulting Engineer – ISL Strong Java/J2EE development experience with High level understanding of Web Applications Architecture, Oracle Database, and J2EE Application Server technology familiarity with Risk Management, Corporate / IT Governance	SWG-0446227	5+ yrs	5+ yrs	Bangalore, Mumbai,Pune, Gurgaon	Bangalore, Mumbai, Pune, Gurgaon
Senior Software Developer (Rational) 8 or more years of development experience in C++, Java, Server side programming, IPC, Multithreading.  Should be hands-on programming in current position	SWG-0446696 /SWG-0447185	8 + /12 +yrs	8 + /12 +yrs	Bangalore	Bangalore
Developer for Rational Performance Tester – ISL 5+ years of Work experience in in Java, aptitude / problem solving, good design / programming skills, Protocols, Agile development, Eclipse UI/Plugin development, Web applications, Data analysis, Performance & Security	SWG-0447186	5+yrs	5+yrs	Bangalore	Bangalore
SVT Tester For Rational Performance Tester – ISL 4+ years of Work experience  with 2+ yrs of understanding of Rational performance tester, Knowledge of testing complex RPT features such as data correlation rules, HTTP recording &  Java, Has developed automation, knowledge of performance monitoring.	SWG-0447202	4+yrs	4+yrs	Bangalore	Bangalore
Functional Verification Testing Lead for Rational Performance Tester – ISL 8 or more years of  experience in Functional Verification Testing , familiar with any test management tool like Rational Quality Manager and eclipse based products, familiarity with load testing.	SWG-0447189	8+yrs	8+yrs	Bangalore	Bangalore
SVT Tester For Rational Software Architect – ISL 4+ years of Work experience  with 2+ yrs of understanding of Rational performance tester/ Rational Software Architect, Knowledge of testing complex RPT features such as data correlation rules, HTTP recording &  Java, Has developed automation, knowledge of performance monitoring.	SWG-0450558	4+yrs	4+yrs	Bangalore	Bangalore
STG SW - ISV - SAP Production Services - ISTL Skills: - SAP Installation and Logistic Tooling (ABAP and Java) – level 5 - SAP Upgrade and Migration (ABAP and Java) – level 5 - SAP Basis Administration (ABAP and Java) - level 4 - SAP Problem reporting and tracking – level 4 - SAP past release knowledge (SAP R/3, SAP 4.6. SAP 6.20 / 6.40): Installation, - Upgrade - level 3 - POWER System - level 4 - SAP NetWeaver Technology Stack – level 4 - SAP Business Suite – level 4 - Linux system programming, admin, installation, update – level 3 - Either DB2 or MaxDB admin, installation, update - level 3	STG-0449589	8 +  years	8+   years	Bangalore	Bangalore
ISV - VLP EUI Developer 1. Advanced level knowledge of OOPS (Object Oriented Programming Style) and Core JAVA including installation, administration, troubleshooting and performance tuning.  4/5 2. Very good knowledge of J2EE (Servlets and JSP)  4/5 3. Very good analytical skill. 4/5 4. Very good communication skills - written and oral. 4/5 5. Very good working knowledge of Rational Software Architect (RSA), Rational Application Developer (RAD) or Eclipse. 3/5 6. Good working knowledge of (CVS) Concurrent Versions System. 3/5 Legacy 7. Very good knowledge of Portlet development (JSR 168 Portlet API), WebSphere Portal including installation of WebSphere Portal Server (WPS), basics of administration, and troubleshooting skills. 4/5 NextGen 8. Good knowledge of J2EE design patterns. 4/5 9. Good knowledge of Javascript and Dojo. 4/5 10. Good knowledge of WebSphere Application Server (WAS) including installation and basic administration skills. 3/5 11. Fair knowledge of Maven. 3/5 12. Fair knowledge of REST (REpresentational State Transfer) API and SOAP (Simple Object Access Protocol) Web Services. 3/5	STG 0443901	4- 6Yrs	4- 6Yrs	Bangalore/ Hyderabad	Bangalore
FSP - Level 3 Support Strong hands on experience in embedded systems programming using C++, OO design patterns, UML on Linux with high quality delivery of design and code • Strong debugging skills : GDB, live system debugging, and strong problem solving skills • Exposure to or experience in technology areas like IPSEC, Networking technologies ,SNMP, CIM, IPMI, I2C, PCI as part of prior project experience • Hands on or exposure to Server development, HW knowledge, domain exposure to virtualization, product/system management or user interface solutions, • Exposure to use of rational tools like RTC, Clear Case, Clear Quest, RSA and Agile practices in development. • strong appetite to drive results aggressively with clean execution skills on project deliverables adhering to software development processes. • Ability to work independently, Adaptability to work with bigger teams in a global environment IPSEC, Networking technologies ,SNMP, CIM, IPMI, I2C, PC	STG-0442533	7-10 yrs	7-10 yrs	Bangalore	Bangalore
Technical Lead/L3 Engineer– Block Storage This individual will be responsible for sustaining engineering for various features of SVC and Storwize V7000. In this role , s/he will be responsible for providing level-3 technical support to product customer base. S/He will be expected to work closely with level-2 support team and customers to understand the issues, do detailed debugging and suggest work around to get the customer up and running. S/He will be expected to investigate failures, develop fixes/patches, testing and releasing of the patch to the customers. This will require working with the development team also to understand the design and implementation of existing features and to work on enhancements for exisiting, new features Strong Storage background with experience in one or more of SAN, NAS, Block level protocols (SCSI, iSCSI, Fibre Channel, Fibre Channel over Ethernet), File level protocols ( NFS, CIFS), Replication, High Availability, Data Deduplication, Backup/Restore, NDMP, Virtualization Strong system programming skills in C. Strong UNIX system programming skills, Kernel development experience is highly desirable Strong OS internals including multithreading, RPC, socket programming. Strong knowledge of data structures and algorithms Strong expertise in debugging tools such as Crash, gdb, kdb, dbx, log analysis Strong problem solving skills Experience with any Source code control system and any Defect Tracking system Good understanding of Software development lifecycle Experience Required L3 –Support role requires 3-8 years of industry experience in product development, L3 support and testing in systems/file systems space. S/He should have BE in Computer Science and Electronics and preferably MS in Computer Science with proven track record of product delivery and technical leadership.	STG-0382718	3-8 Yrs	3-8 Yrs	Pune	Pune
Storage Development Engineer / Lead Education Minimum B Tech/BE/MCA in Computer Science/Electronics/Electrical Engineering from a reputed institute  Technical Skills requirement Strong Storage background with experience in one or more of SAN, NAS, Block level protocols (SCSI, iSCSI, Fibre Channel, Fibre Channel over Ethernet), File level protocols ( NFS, CIFS), Replication, High Availability, Data Deduplication, Backup/Restore, NDMP, Virtualization Strong system programming skills in C. Strong UNIX system programming skills, Kernel development experience is highly desirable Strong OS internals including multithreading, RPC, socket programming. Strong knowledge of data structures and algorithms Strong expertise in debugging tools such as Crash, gdb, kdb, dbx, log analysis Strong problem solving skills Experience with any Source code control system and any Defect Tracking system Good understanding of Software development lifecycle and methodology ( Waterfall or Agile)	STG-0382704	2-12 Yrs	2-12 Yrs	Pune	Pune
File Systems Developer Job Description This individual will be responsible to lead design, implementation and review of various features for world’s best Parallel Cluster File System (i.e. IBM GPFS) and other Distributed File Systems like (AFS, DFS and SANFS). S/He will be working as technical contributor in the team and as appropriate provide technical leadership to the team and advice development manager with various planning activities. The individual will act as a mentor for junior members in the development team and will work closely with product architects and other technical leads in development and test teams. He will be expected to drive innovation, architect and develop new features in roadmap and product quality through his technical skills and prior experience. Job Skills Required A) Technical Skills Strong architecture, design and development experience in file systems and clustering Strong skills in systems software stack Strong skills in storage and file system technologies Strong system programming including kernel development and debugging tools Strong system programming skills in C, C++ and shell scripting Good performance optimization skills for complex clustered NAS software stack Strong problem solving skills Exposure to clustering products a plus Experience with any Source code control system and any Defect Tracking system Good understanding of Software development lifecycle and methodology ( Waterfall or Agile) B) Soft skills Ability to form and articulate product vision and interact with customers and partners Ability to provide thought leadership, accessing risk and driving innovation Excellent communication, collaboration, interpersonal and mentoring skills Experience Required This role requires 2-12 years of industry experience in product architecture, design, development and testing in systems/file systems/storage space. S/He should be B Tech/BE/MCA in Computer Science/Electronics/Electrical Engineering from a reputed institute	STG-0382708	2-12 Yrs	2-12 Yrs	Pune , Bangalore	Pune
Systems Developer: We are currently looking for 2-5 yrs exp candidates with following skills. - C - Scripting - Linux handson - Very good operating systems and networking knowledge - Added advantage - Storage background.	STG-0382712	3-8Yrs	3-8Yrs	Pune	Pune
Sys Management Developer A] PRIMARY Skills Required: Java Development, Debugging/Profiling, Database programming (JDBC/SQL) Java Concurrency / Multithreading,  Design Patterns, Linux Skills, Basic Usage & Administration, Linux shell scripting (bash/korn shell), Web Development Skills JavaScript/HTML, Web Applications/Servlets, Dojo/JSON  Development tools Agile Development Methods, Version Control (SVN), Eclipse IDE (Rational Software Architect) B ]  Secondary Skills Required: XML parsing, Ant packaging, Samba/Ftp/apache/nfs/ssh, Distributed File Systems background JSP/JSF, Tomcat C ] Other Technical Skills : Common Information Model (CIM), TCP/IP Networking , SNMP, UML	STG-0382715	3-8Yrs	3-8Yrs	Pune	Pune
Storage Test  ( 5 to 10 yrs) Job Skills Required A) Technical Skills Strong background in testing system software products (OS, Device Driver, etc) Strong background in server, network and storage administration and configuration Excellent understanding of storage technologies (Virtualization, RAID, Block/File IO) Excellent understanding of Storage Protocols (Fibre Channel, SCSI , SAN, iSCSI etc) Excellent architecture and debugging skills in system software and storage protocols Experience with one programming & scripting language (C/C++/Java, Shell scripts/Perl) Familiarity with competitive offerings, customer use cases and real life field issues Familiarity with protocol analyzers, IO exercisers, IO jammers and performance tools Deep understanding of test tools like Test case management, Bug tracker, automation frameworks and understanding of the integration of these tools. Experience Required This role requires 5-10 years of industry experience in product development, testing and backend customer support. S/He should have BE in either of Computer Science, Electronics or Electrical Engineering and preferably MS in Computer Science. S/He should have 5+ years of relevant experience in testing storage products and protocols and should have proven track record with key accomplishments.	STG-0382719	5-10Yrs	5-10Yrs	Pune	Pune
Storage Test Automation Engineer In the role of Storage test automation engineer, this individual will provide automation leadership for test design and guidance during test specification of individual product features for IBM products in storage domain. S/He will provide technical leadership and advice Test Manager with test planning activities. Job Skills Required A) Technical Skills Strong background in testing system software products (OS, Device Driver, etc) Good experience with shell/bash or perl scripting  Should have done testing on Linux environments  Should have Storage/Network testing background  Strong background in server, network,, files systems, SAN and NAS Excellent understanding of cluster and parallel file system technologies or of storage technologies (Virtualization, RAID, Block/File IO) and Storage Protocols (Fibre Channel, SCSI , SAN, iSCSI etc) Familiarity with protocol analyzers, IO exercisers, IO jammers and performance tools Excellent debugging and problem solving skills Experience Required This role requires 5+ years of relevant test automation experience in systems/file systems/storage space. S/He should have BE in Computer Science and Electronics and preferably MS in Computer Science with proven track record of product testing and technical leadership	STG-0382721	5-8Yrs	5-8Yrs	Pune	Pune
AIX – Dev & Level 3 Support Experience in Unix(Linux/HP-UNIX/Solaris/Linus)  Kernel Development/Systems Programming, High Availablity products Experience in C,C++ , Unix(Linux/HP-UNIX/Solaris/Linus)  Systems Programming, Perl / Shell Scripting , Experience in High Availability Products, Disaster Recovery, Basic Networking.	STG-0442351	7-12 yrs	7-12 yrs	Hyderabad	Hyderabad/Bangalore
AIX - Virtualization Performance Benchmarking 4 to 8 yrs of industry experience in system software performance/testing/analysis Strong hands-on knowledge of C and scripting languages (perl, shell) Should have worked on any of the Unix internals (AIX/Linux/HP-UX/Solaris/Linux) - AIX preferred Strong knowledge of various virtualization technologies such as KVM, HyperVisor, PowerVM, Xen, VMware, etc. Excellent debugging skills (kernel level - to aid in analyzing performance bottlenecks) Operating systems fundamentals, Data structures, Unix Programming	STG-0444540	4-8 yrs	4-8 yrs	Bangalore	Bangalore
AIX – VIOS The role would be of an individual contributor working in AIX Virtualization team. Candidate should posses good C programming skills, OS internal knowledge, hands on experience in kernel programming and exposure to any of the Unix Virtualization technology.	STG-0449033	6 – 15 yrs	6 – 15 Yrs	Bangalore	Bangalore